Students get through AP Inter 2nd Year Physics Important Questions 15th Lesson Semiconductor Electronics: Material, Devices and Simple Circuits which are most likely to be asked in the exam.

## AP Inter 2nd Year Physics Important Questions 15th Lesson Semiconductor Electronics: Material, Devices and Simple Circuits

Very Short Answer Questions

Question 1.

What is an n-type semiconductor? What are the majority and minority charge carriers in it?

Answer:

- If a pentavalent impurity is added to a pure tetravalent semiconductor, it is called an n-type semiconductor.
- In n-type semiconductor majority, of charge carriers are electrons and the minority charge carriers are holes.

Question 2.

What are intrinsic and extrinsic semiconductors? [A.P. Mar. 15]

Answer:

- Pure form of semiconductors are called intrinsic semiconductors.
- When impure atoms are added to increase their conductivity, they are called extrinsic semiconductors.

Question 3.

What is a p-type semiconductor ? What are the majority and minority charge carriers in it ? [A.P. & T.S. Mar. 17]

Answer:

If a trivalent impurity is added to a tetravalent semiconductor, it is called p-type semi-conductor.

In p-type semiconductor majority charge carriers are holes and minority charge carriers are electrons.

Question 4.

What is a p-n junction diode ? Define depletion’ layer.

Answer:

When an intrinsic semiconductor crystal is grown with one side doped with trivalent element and on the other side doped with pentavalent element, a junction is formed in the crystal. It is called p-n junction diode.

A thin narrow region is formed on either side of the p-n junction, which is free from charge carriers is called depletion layer.

Question 5.

How is a battery connected to a junction diode in i) forward and ii) reverse bias ?

Answer:

i) In p-n junction diode, if p-side is connected to positive terminal of a cell and n-side to negative terminal, it is called forward bias.

ii) In a p-n junction diode, p-side is connected to negative terminal of a cell and n-side to positive terminal, it is called reverse bias.

Question 6.

What is the maximum percentage of rectification in half wave and full wave rectifiers ?

Answer:

- The percentage of rectification in half-wave rectifier is 40.6%.
- The percentage of rectification in full-wave rectifiers is 81.2%.

Question 7.

What is Zener voltage (V_{z}) and how will a Zener diode be connected in circuits generally ?

Answer:

- When Zener diode is in reverse biased, at a particular voltage current increases suddenly is called Zener (or) break down voltage.
- Zener diode always connected in reverse bias.

Question 8.

Write the expressions for the efficiency of a full wave rectifier and a half wave rectifier.

Answer:

- Efficiency of half wave rectifier (η) = \(\frac{0.406 \mathrm{R}_{\mathrm{L}}}{\mathrm{r}_{\mathrm{f}}+\mathrm{R}_{\mathrm{L}}}\)
- Efficiency of full wave rectifier (η) = \(\frac{0.812 \mathrm{R}_{\mathrm{L}}}{\mathrm{r}_{\mathrm{f}}+\mathrm{R}_{\mathrm{L}}}\)

Question 9.

What happens to the width of the depletion layer in a p-n junction diode when it is

i) forward-biased and ii) reverse biased ?

Answer:

When a p-n junction diode is forward bias, thickness of depletion layer decreases and in reverse bias, thickness of depletion layer increases.

Question 10.

Draw the circuit symbols for p-n-p and n-p-n transistors. [Mar. 14]

Answer:

Question 11.

Define amplifier and amplification factor.

Answer:

- Rising the strength of a weak signal is known as amplification and the device is called amplifier.
- Amplification factor is the ratio between output voltage to the input voltage.

A = \(\frac{\mathrm{V}_0}{\mathrm{~V}_{\mathrm{i}}}\)

Question 12.

In which bias can a Zener diode be used as voltage regulator ?

Answer:

In reverse bias Zener diode can be used as voltage regulator.

Question 13.

Which gates are called universal gates ? [T.S. Mar. 15]

Answer:

NAND gate and NOR gates are called universal gates.

Question 14.

Write the truth table of NAND gate. How does it differ from AND gate ?

Answer:

Short Answer Questions

Question 1.

What is a rectifier ? Explain the working of half wave and full Wave rectifiers with diagrams. [A.P. Mar. 17]

Answer:

Rectifier: It is a circuit which converts ac into d.c. A p-n junction diode is used as a rectifier.

Half-wave rectifier:

- A half wave rectifier can be constructed with a single diode. The ac input signal is fed to the primary coil of a transformer. The output signal is taken across the load resistance R
_{L}. - During positive half cycle, the diode is forward biased and current flows through the diode.
- During negative half cycle, diode is reverse biased and no current flows through the load resistance.
- This means current flows through the diode only during positive half cycles and negative half cycles are blocked. Hence in the output we get only positive half cycles.
- Rectifier efficiency is defined as the ratio of output dc power to the input ac power.

η = \(\frac{\mathrm{P}_{\mathrm{dc}}}{\mathrm{P}_{\mathrm{ac}}}=\frac{0.406 \mathrm{R}_{\mathrm{L}}}{\mathrm{r}_{\mathrm{f}}+\mathrm{R}_{\mathrm{L}}}\)

Where r_{f}= Forward resistance of a diode; R_{L}= Load resistance

The maximum efficiency of half wave rectifier is 40.6%.

Full wave rectifier : The process of converting an alternating current into a direct current is called rectification.

The device used for this purpose is called rectifier.

- A full wave rectifier can be constructed with the help of two diodes D
_{1}and D_{2}. - The secondary transformer is centre tapped at C and its ends are connected to the p regions of two diodes D
_{1}& D_{2}. - The output voltage is measured across the load resistance R
_{L}. - During positive half cycles of ac, the diode D
_{1}is forward biased and current flows through the load resistance R_{L}. At this time D_{2}will be reverse biased and will be in switch off position. - During negative half cycles of ac, the diode D
_{2}is forward biased and the current flows through R_{L}. At this time D_{1}will be reverse biased and will be in switch off position. - Hence positive output is obtained for all the input ac signals.
- The efficiency of a rectifier is defined as the ratio between the output dc power to the input ac power.

η = \(\frac{\mathrm{P}_{\mathrm{dc}}}{\mathrm{P}_{\mathrm{ac}}}=\frac{0.812 \mathrm{R}_{\mathrm{L}}}{\mathrm{r}_{\mathrm{f}}+\mathrm{R}_{\mathrm{L}}}\)

The maximum efficiency of a full wave rectifier is 81.2%.

Question 2.

What is a junction diode ? Explain the formation of depletion region at the junction. Explain the variation of depletion region in forward and reverse-biased condition.

Answer:

p-n junction diode: When a p-type semiconductor is suitablyjoined to n-type semiconductor, a p-n junction diode is formed. ’

The circuit symbol of p-n junction diode is shown in figure.

Formation of depletion layer at the junction: When p-n junction is formed, the free electrons on n-side diffuse over to p-side, they combine with holes and become neutral. Similarly holes on p-side diffuse over to n-side and combihe with electrons become neutral.

This results in a narrow region formed on either side of the junction. This region is called depletion layer. Depletion layer is free from charge carriers.

The n-type material near the junction becomes positively charged due to immobile donor ions and p-type material becomes negatively charged due to immobile acceptor ions. This creates an electric field near the junction directed from n-region to p-region and cause a potential barrier.

The potential barrier stops further diffusion of holes and electrons across the* junction. The value of the potential barrier depends upon the nature of the crystal, its temperature and the amount of doping.

Forward bias :

“When a positive terminal of a battery is connected to p-side and negative terminal is connected to n-side; then p-n junction diode is said to be forward bias”.

The holes in the p-region are repelled by the positive polarity and move towards the junction. Similarly electrons in the n-region are repelled by the negative polarity and move towards the junction.

As a result, the width of the depletion layer decreases. The charge carriers cross the junction apd electric current flows in the circuit.

Hence in forward bias resistance of diode is low. This position is called switch on position.

Reverse bias:

“When the negative terminal of the battery is connected to p-side and positive terminal of the battery is connected to n-side of the p-n junction, then the diode is said to be reverse bias”.

The holes in the p-region are attracted towards negative polarity and move away from the junction. Similarly the electrons in the n-region are attracted towards positive polarity and move away from the junction.

So, width of the depletion layer and potential barrier increases. Hence resistance of p-n junction diode increases. Thus the reverse biased diode is called switch off position.

Question 3.

What is a Zener diode ? Explain how it is used as a voltage regulator.

Answer:

Zener diode : Zener diode is a heavily doped germanium (or) silicon p-n junction diode. It works on reverse bias break down region.

The circuit symbol of zener diode is shown in figure.

Zener diode can be used as a voltage regulator. In- general zener diode is connected in reverse bias in the circuits.

- The zener diode is connected to a battery, through a resistance R. The battery reverse biases the zener diode.
- The load resistance R
_{L}is connected across the terminals of the zener diode. - The value of R is selected in such away that In the absence of load R
_{L}maximum safe current flows in the diode. - Now consider that load is connected across the diode. The load draws a current.
- The current through the diode falls by the same amount but the voltage drops across the load remains constant.
- The series resistance ‘R’ absorbs the output voltage fluctuations, so as to maintain constant voltage across the load.
- The voltage across the zener diode remains constant even if the load R
_{L}varies. Thus, zener diode works as voltage regulator. - If I is the input current, I
_{Z}and I_{L}are zener and load currents.

I = I_{Z}+ I_{L}; V_{in}= IR + V_{Z}

But V_{0ut}= V_{Z}

∴ V_{out}= V_{in}– IR

Question 4.

Explain the working of LED and what are its advantages over conventional incandescent low power lamps.

Answer:

Light emitting diode (LED) : It is a photoelectronic device which converts electrical energy into light energy.

It is a heavily doped p-n junction diode which under forward bias emits spontaneous radiation. The diode is covered with a transparent cover so that the emitted light may not come out. Working : When p-n junction diode is forward biased, the movement of majority charge carriers takes place across the junction. The electrons move from n-side to p-side through the junction and holes move from p-side to n-side.

As a result of it, concentration of majority carriers increases rapidly at the junction.

When there is no bias across the junction, therefore there are excess minority carriers on either side of the junction, which recombine with majority carriers near the junction.

On recombination of electrons and hole, the energy is given out in the form of heat and light.

Advantages of LED’s over incandescent lamp :

- LED is cheap and easy to handle.
- LED has less power and low operational voltage.
- LED has fast action and requires no warm up time.
- LED can be used in burglar alarm system.

Question 5.

Define NAND and NOR gates. Give their truth tables. [T.S. Mar. 17]

Answer:

NAND gate : NAND gate is a combination of AND gate and NOT gate.

NAND gate can be obtained by connecting a NOT gate in the output of an AND gate. NAND gates are called universal gates.

- If both inputs are low, output is high.

A = 0, B = 0, X = 1 - If any input is low, output is high.

A = 0, B = 1, X = 1

A = 1, B = 0, X =1 - If both inputs are high, output is low.

A = 1, B = 1, X = 0

NOR gate : NOR gate is a combination of OR gate and NOT gate when the output of OR gate is connected to NOT gate. It has two (or) more inputs and one output.

- If both inputs are low, output is high.

A = 0, B = 0, X = 1 - If any input is high, the output is low.

A = 0, B = 1, X = 0

A = 1, B = 0, X = 0 - If both inputs are high, the output is low.

A = 1, B = 1, X = 0

NOR gate is also a universal gate.

Question 6.

Explain the working of a solar cell and draw its I-V characteristics.

Answer:

Solar cell is a p-n junction device which converts solar energy into electric energy.

It consists of a silicon (or) gallium – arsenic p-n junction diode packed in a can with glass window on top. The upper layer is of p- type semiconductor. It is very thin so that the incident light photons may easily reach the p-n junction.

Working : When light (E = hv) falls at the junction, electron – hole pairs are generated near the junction. The electrons and holes produced move in opposite directions due to junction field. They will be collected at the two sides of the junction giving rise to a photo voltage between top and bottom metal electrodes. Top metal acts as positive electrode and bottom metal acts as a negative electrode. When an external load is connected across metal electrodes a photo current flows.

I-V characteristics : I – V characteristics of solar cell is drawn in the fourth quadrant of the coordinate axes. Because it does not draw current.

Uses : They are used in calculators, wrist watches, artificial satellites etc.

Question 7.

Explain the operation of a NOT gate and give its truth table. [IPE 15, T.S.]

Answer:

NOT gate: NOT gate is the basic gate. It has one input and one output. The NOT gate is also called an inverter. The circuit symbol of NOT gate is shown in figure.

- If input is low, output is high.

A = 0, X = \(\overline{0}\) = 1 - If input is high, output is low.

A = 1, X = \(\overline{1}\) = 0

Question 8.

Draw an OR gate using two diodes and explain its operation. Write the truth table and logic symbol of OR gate.

Answer:

OR Gate : It has two input terminals and one output terminal. If both inputs are low the output is low. If one of the inputs is high, or both the inputs are high then the output of the gate is high. The truth tables of OR gate.

In truth table logic function is written as A or B ‘OR’ logic function is represented by the symbol ‘plus’.

Q = A + B

Logic gate ‘OR’ is shown given below.

Implementation of OR gate using diodes :

Let D_{1} and D_{2} be two diodes.

A potential of 5V represents the logical value 1.

A potential of OV represents the logical value 0.

When A = 0, B = 0 both the diodes are reverse biased and there is no current through the resistance. So, the potential at Q is zero i.e., Q = 0. When A = 0 or B = 0 and the other equal to a potential of 5 V the diode whose anode is at a potential of 5 V is forward – biased and that diode behaves like a closed switch. The output potential then becomes 5 V i.e., Q = 1. When both A and B are 1, both the diodes are forward-biased and the potential at Q is same as that at A and B which is 5 V i.e., Q = 1. The output is same as that of the OR gate.

Question 9.

Sketch a basic AND circuit with two diodes and explain its operation. Explain how doping increases the conductivity in semiconductors ?

Answer:

AND gate : It has two input terminals and one output terminal.

- If both the inputs are low (or) one of the inputs is low.
- The output is low in an AND gate.

- If both the inputs .are high
- The output of the gate is high.

- Note : If A and B are the inputs of the gate and the output is ‘Q’ then ‘Q’ is a logical function of A and B.

AND gate Truth Tables

The logical function AND is represented by the symbol dot so that the output, Q = A.B and the circuit symbol used for the logic gate AND is shown in Fig.

The logical function AND is similar to the multiplication.

Implementation of AND gate using diodes : Let D_{1} and D_{2} represents two diodes. A potential of 5 V represents the logical value 1 and a potential of 0 V represents the logical value zero (0). When A = 0, B = ,0 both the diodes D_{1} and D_{2} are forward-biased and they behave like closed switches. Hence, the output Q is same as that A or B (equal to zero.) When A = 0 or B = 0, D_{1} or D_{2} is forward – biased and Q is zero. When A = 1 and B = T both the diodes are reverse – biased and they behave like open switches. There is no current through the resistance R making the potential at Q equal to 5V i.e., Q = 1. The output is same as that of an AND gate.

Doping increases the conductivity in Semiconductors: If a pentavalent impurity (Arsenic) is added to a pure tetravalent semiconductor it is called n-type semiconductor. Arsenic has 5 valence electrons, but only 4 electrons are needed to form covalent bonds with the adjacent Germanium atoms. The fifth electron is very loosely bound and become a free electron. Therefore excess electrons are available for conduction and conductivity of semiconductor increases.

Similarly when a trivalent impurity Indium is added to pure Germanium it is called p-type semi-conductor. In this excess holes in addition to those formed due to thermal energy are available for conduction in the valence band and the conductivity of semiconductor increases.

Question 10.

Explain how transistor can be used as a switch ?

Answer:

To understand the operation of transistor as a switch.

- As long as V
_{i}is low and unable to forward bias the transistor, V_{0}is high (at V_{cc}). - If V
_{i}is high enough to drive the transistor into saturation then V_{0}is low, very near to zero.

- When the transistor is not conducting it is said to be switched off and when it is driven into saturation it is said to be switched on.
- We can say that a low input to the transistor gives a high output and high input gives a low output.
- When the transistor is used in the cutoff (or) saturation state it acts as a switch.

Problems

Question 1.

In a half wave rectifier, a p-n junction diode with internal resistance 20 ohm is used. If the load resistance of 2 ohm is used in the circuit, then find the efficiency of this half wave rectifier.

Solution:

Internal resistance (r_{f}) = 20Ω

R_{L} = 2kΩ = 2000 Ω

η = \(\frac{0.406 \mathrm{R}_{\mathrm{L}}}{\mathrm{r}_{\mathrm{f}}+\mathrm{R}_{\mathrm{L}}}=\frac{0.406 \times 2000}{20+2000} \times 100=\frac{812 \times 100}{2020}\)

η = 40.2%.

Question 2.

A full wave p-n junction diode rectifier uses a load resistance of 1300 ohm. The internal resistance of each diode is 9 ohm. Find the efficiency of this full wave rectifier.

Solution:

Given that R_{L} = 1300 Ω

r_{f} = 9Ω

η = \(\frac{0.812 \mathrm{R}_{\mathrm{L}}}{\mathrm{r}_{\mathrm{f}}+\mathrm{R}_{\mathrm{L}}}=\frac{0.812 \times 1300}{9+1300} \times 100 ; \eta=\frac{8120 \times 13}{1309}\)

η = 80.64%.

Question 3.

Calculate the current amplification factor β(beta) when change in collector current is 1mA and change in base current is 20μA.

Solution:

Change in collector current (∆I_{C}) = 1mA = 10^{-3} A

Change in base current (∆I_{B}) = 20 μA = 20 × 10^{-6} A

β = \(\frac{\Delta \mathrm{I}_{\mathrm{C}}}{\Delta \mathrm{I}_{\mathrm{B}}}=\frac{10^{-3}}{20 \times 10^{-6}}\); β = \(\frac{1000}{20}\)

β = 50

Question 4.

For a transistor amplifier, the collector load resistance R_{L} = 2k ohm and the input resistance R_{i} = 1 k ohm. If the current gain is 50, calculate voltage gain of the amplifier.

Solution:

R_{L} = 2kΩ = 2 × 10^{3} Ω

R_{i} = 1kΩ = 1 × 10^{3} Ω

β = 50.

Voltage gain (A_{V}) = β × \(\frac{\mathrm{R}_{\mathrm{L}}}{\mathrm{R}_{\mathrm{i}}}=\frac{50 \times 2 \times 10^3}{1 \times 10^3}\)

A_{V} = 100.

Textual Examples

Question 1.

C, Si and Ge have same lattice structure. Why is C insulator while Si and Ge intrinsic semiconductors ?

Solution:

The 4 bonding electrons of C, Si or Ge lie, respectively, in the second, third and fourth orbit. Hence, energy required to take out and electron from these atoms(i.e., ionisation energy E_{g}) will be least for Ge, following by Si and highest for C. Hence, number of free electrons for conduction in Ge and Si are significant but negligibly small for C.

Question 2.

Suppose a pure Si crystal has 5 × 10^{28} atoms m^{-3}. It is doped by 1 ppm concentration of pentavalent As. Calculate the number of electrons and holes. Given that n. = 1.5 × 10^{16} m^{-3}.

Solution:

Note that thermally generated electrons (n_{i} ~ 10^{16} m^{-3}) are negligibly small as compared to those produced by doping.

Therefore, n_{i} ≈ N_{D}.

Since n_{e}n_{h} = n_{i}^{2}, The number of holes, n_{h} = (1.5 × 10^{16})^{2} / 5 × 10^{28} × 16^{-6}

n_{h} = (2.25 × 10^{32})/(5 × 10^{22}) ~ 4.5 × 10^{9}m^{-3}

Question 3.

Can we take one slab of p-type semiconductor and physically join it to another n-type semiconductor to get p-n junction ?

Solution:

No ! Any slab, howsoever flat, will have roughness much large than the inter-atomic crystal spacing(~2 to 3 A°) and hence continuous contact at the atomic level will not be possible. The junction will behave as a discontinuity for the flowing charge carriers.

Question 4.

The V-I characteristics of a silicon diode are shown in the Fig. Calculate the resistance of the diode at (a) I_{D} = 15 mA and (b) V_{D} = -10 V.

Solution:

Considering the diode characteristics as a straight line between I = 10 mA to I = 20 mA passing through the origin, we can calculate the resistance using Ohm’s law.

a) From the curve, at I = 20 mA, V = 0.8 V, I = 10 mA, V = 0.7 V

r_{fb} = ∆V/∆I = 0.1V/10mA = 10Ω

b) From the curve at V = -10 V, I = -1 µA.

Therefore r_{rb} = 10V/1µA = 1.0 × 10^{7} Ω

Question 5.

In a Zener regulated power supply a Zener diode’with V_{z} = 6.0 V is used for regulation. The load current is to be 4.0 mA and the unregulated input is 10,0 V. What should be the value of series resistor R_{s}?

Solution:

The value of Rs should be such that the current through the Zener diode is much larger than the load current. This is to have good load regulation. Choose Zener current as five times the load current, i.e., I_{z} = 20 mA. The total current through R_{S} is , therefore, 24 mA. The voltage drop across R_{S} is 10.0 – 6.0 = 4.0 V This gives R_{S} = 4.0V/(24 × 10^{-3}) A = 167Ω. The nearest value of carbon resistor is 150 Ω. So, a series resistor of 150 Ω is appropriate. Note that slight variation in the value of the resistor does not matter, what is important is that the current I_{Z} should be sufficiently larger than I_{L}.

Question 6.

The current in the forward bias is known to be more (~mA) than the current in the reverse bias (~µA). What is the reason then to operate the photodiodes in reverse bias ?

Solution:

Consider the case of an n-type semiconductor. Obviously, the majority carrier density (n) is considerably larger than the minority hole density p (i.e., n> > p). On illumination, let the excess eletrons and holes generated be ∆n and ∆p, respectively,

n’ = n + ∆n

p’ = p + ∆p

Here n’ and p’ are the electron and hole concentrations at any particular illumination and n and p are carriers concentration when there is no illumination. Remember ∆n = ∆p and n > > p. Hence, the fractional change in the majority carriers (i.e., ∆n/n) would be much less than that in the minority carriers (i.e,, ∆p/p). In general, we can state that the fractional change due to the photo-effects on the minority carrier dominated reverse bias current is more easily measurable than the fractional change in the forward bias current. Hence, photodiodes-are preferably used in the reverse bias condition for measuring light intensity.

Question 7.

Why are Si and GaAs are preferred materials for solar cells ?

Solution:

The solar radiation spectrum received by us is shown in figure.

The maxima is near 1.5 eV. For photo-excitation, hv > E_{g}. Hence, semiconductor with band gap ~1.5 eV or lower is likely to give better solar conversion efficiency. Silicon has E_{g} ~ 1.1 eV while for GaAS it is ~ 1.53 eV. In fact, GaAs is better On spite of its higher band gap) than Si because of its relatively higher absorption coefficient. If we choose materials like CdS or CdSe(E_{g} ~ 2.4 eV), we can use only the high energy component of the solar energy for photo-conversion and a significant part of energy will be of no use.

The question arises: why we do not use material like pbS(E_{g} ~ 0.4 eV) which satisfy the condition hv > E_{g} for v maxima corresponding to the solar radiation spectra ? if we do so, most of the solar radiation will be absorbed on the top-layer of solar cell mid will not reach in or near the depletion region. For effective electron-hole separation, due to the junction field, we want the photo-generation to occur in the junction region only.

Question 8.

From the output charactristics shown in fig, calculate the values of β_{ac} and β_{dc} of the transistor when V_{CE} is 10 V and I_{C} = 4.0 mA.

Solution:

β_{ac} = \(\left(\frac{\Delta \mathrm{I}_{\mathrm{C}}}{\Delta \mathrm{I}_{\mathrm{B}}}\right)_{\mathrm{V}_{\mathrm{CE}}}\) ; β_{dc} = \(\frac{\mathrm{I}_{\mathrm{C}}}{\mathrm{I}_{\mathrm{B}}}\)

For determining β_{ac} and β_{dc} at the stated values of V_{CE} and I_{C} one can proceed as follows. Consider any two characteristics for two values of I_{B} which lie above and below the given value of I_{C}. Here I_{C} = 4.0 mA. (Choose characteristics for I_{B} = 30 and 20μA.) At V _{CE} = 10V

we read the two values of Ic from the graph. Then

∆I_{B} = (30 – 20)μA = 10μA. ∆I_{C}

= (4.5 – 3.0) mA = 1.5 mA

Therefore, β_{ac} =1.5 mA/ 10μA = 150

For determining β_{dc} either estimate the value of I_{B} corresponding to I_{C} = 4.0 mA at V_{CE} = 10V or calculate the two values of β_{dc} for the two characteristics chosen and find their mean.

Therefore, for I_{C} = 4.5 mA and I_{B} = 30 μA

β_{dc} = 4.5 mA/30 μA = 150 and for I_{C} = 3.0 mA/ and I_{B} = 20 μA

β_{dc} = 3.0 mA / 20 μA= 150

Hence, β_{dc} = (150 + 150)/ 2 = 150

Question 9.

In Fig. the V_{BB} supply can be varied from OV to 5.0 V. The Si transistor has β_{dc} = 250 and R_{B} = 100 kΩ, R_{C} = 1 KΩ, V_{CC} = 5.0V. Assume that when the transistor is saturated, V_{CE} = 0V and V_{BE} = 0.8V. Calculate

(a) the minimum base current, for which the transistor will reach saturation. Hence,

(b) determine V_{1} for when the transistor is ‘switched on’,

(c) find the ranges of V_{1} for which the transistor is ‘switched of and ‘switched on’.

Solution:

Given at stauration

V_{CE} = OV, V_{BE} = 0.8V

V_{CE} = V_{CC} – I_{C}R_{C}

I_{C} = V_{CC} / R_{C} = 5.0V/1/0 kΩ = 5.0mA

Therefore, I_{B} = I_{C}/β

= 5.0 mA/250 = 20μA

The input voltage at which the transistor will go into saturation is given by

V_{IH} = V_{BB} = I_{B}R_{B} + V_{BE}

= 20μA × 100 kΩ + 0.8V = 2.8V

The value of input voltage below which the transistor remains cutoff is given by

V_{IL} = 0.6V, V_{IH} = 2.8V

Between 0.0V and 0.6V the transistor will be in the ‘switched off-state. Between 2.8V and 5.0V, it will be in ‘switched on’ state.

Note that the transistor is in active state when I_{B} varies from 0.0mA to 20mA. In this range, I_{C} = βI_{B} is valid. In the saturation range I_{C} ≤ βI_{B}.

Question 10.

For a CE transistor amplifier, the audio signal voltage across the collector resistance of 2.0 kΩ is 2.0 V. Suppose the current amplification factor of the transistor is 100, what should be the value of R_{B} in series with V_{BB} supply of 2.0 V if the dc base current has to be 10 times the signal current. Also calculate the dc drop across the collector resistance. (Refer to Fig)

Solution:

The output ac voltage is 2.0 V. So, the ac collector current i_{C}= 2.0/2000 = 1.0 mA. The signal current through the base is, therefore given by i_{B} = i_{C}/β = 1.0 mA/100 = 0.010 mA. The dc base current has to be 10 × 0.010 = 0.10 mA

From V_{BB} = V_{BE}+ I_{B} R_{B} R_{B} = (V_{BB} – V_{BE})/I_{B}. Assuming V_{BE} = 0.6V

R_{B} = (2.0 – 0.6)/0.10 = 14kΩ

The dc collector current I_{C} = 100 × 0.10 = 10 mA.

Question 11.

Justify the output waveform (Y) of the OR gate for the following inputs A and B given in fig.

Solution:

Note the following :

- At t ≤ t
_{1}; A = 0, B = 0; Hence Y = 0 - For t
_{1}to t_{2}; A = 1, B = 0; Hence Y = 1 - For t
_{2}to t_{3}; A = 1, B = 1; Hence Y = 1 - For t
_{3}to t_{4}; A = 0, B = 1; Hence Y = 1 - For t
_{4}to t_{5}; A = 0, B = 0; Hence Y = 0 - For t
_{5}to t_{6}; A = 1, B = 0; Hence Y = 1 - For t > t
_{6}; A = 0,B = 1; Hence Y = 1

Therefore the waveform Y will be as shown in the Fig.

Question 12.

Take A and B input waveforms similar to that in Example 11. Sketch the output waveform obtained from AND gate.

Solution:

- For t ≤ t
_{1}; A = 0, B = 0; Hence Y = 0 - For t
_{1}to t_{2}; A = 1, B = 0; Hence Y = 0 - For t
_{2}to t_{3}; A = 1, B = 1; Hence Y = 1 - For t
_{3}to t_{4}; A = 0, B = 1; Hence Y = 0 - For t
_{4}to t_{5}; A = 0, B = 0; Hence Y = 0 - For t
_{5}to t_{6}; A = 1, B = 0; Hence Y = 0 - For t > t
_{6}; A = 0,B = 1; Hence Y = 0

Based on the above, the output waveform for AND gate can be drawn as given below.

Question 13.

Sketch the output Y from a NAND gate having inputs A and B given below :

Solution:

- For t ≤ t
_{1}; A = 1, B = 1; Hence Y = 0 - For t
_{1}to t_{2}; A = 0, B = 0; Hence Y = 1 - For t
_{2}to t_{3}; A = 0, B = 1; Hence Y = 1 - For t
_{3}to t_{4}; A = 1, B = 0; Hence Y = 1 - For t
_{4}to t_{5}; A = 1, B = 1; Hence Y = 0 - For t
_{5}to t_{6}; A = 0, B = 0; Hence Y = 1 - For t > t
_{6}; A = 0,B = 1; Hence Y = 1